1. Field of the Invention
The invention relates in general to a protecting circuit for a horizontal transistor, and more particularly to a protecting circuit in a horizontal transistor in cathode ray tubes.
2. Description of the Related Art
Recently, the electronics industry has shown a great improvement in the technology. For example, the consumer electronics company can make a color TV with a large-scale screen, high resolution and high tone quality. The color TV uses a cathode ray tube (CRT) as an electrical image display device since the CRT provides a fast image display with sufficient brightness and excellent color reconstruction. A synchronous deflecting circuit is an essential part of the CRT and in order to ensure the quality of the image reconstruction, the synchronous deflecting circuit includes a vertical deflecting circuit and a horizontal deflecting circuit.
The vertical deflecting circuit is for deflecting the electron beam in the vertical (up and down) direction and the horizontal deflecting circuit is for deflecting the electron beam in the horizontal (left and right) direction. Referring to FIG. 1, it shows a conventional horizontal deflecting circuit, which includes a horizontal driving circuit, a horizontal output circuit and a S-character correcting loop.
The horizontal driving circuit 102, which includes a driving transistor Q1, a horizontal driving transformer T1, a resistor R1, and a regulating capacitor C1, is for controlling the on/off status of the horizontal transistor Q2. A horizontal driving signal H-SYNC is sent to the driving transistor Q1. The horizontal output circuit 104 consists of a horizontal transistor Q2, a zener diode D1, and a capacitor CT. The current flows to the a horizontal deflecting winding 106 as a saw-toothed signal from the horizontal output circuit 104. The S-character correcting loop 108 is for solving the over-deflection of the electron beam near the tube of the CRT. The horizontal deflecting winding 106 and the S-character correcting loop 108 are connected in series by a horizontal linear coil 110.
In a large-scale CRT, in order to be operated in different horizontal deflecting frequencies, the S-character correcting loop 108 includes a main capacitor CS and many sub capacitors CS0, CS1, CS2, . . . CSx. The sub capacitors are all connected to the main capacitor CS in parallel. Each sub capacitor CS0, CS1, CS2, . . . CSx (e.g. CS0) is connected to a controlled switch SW0, SW1, SW2, . . . SWx (e.g. SW0) and each controlled switch SW0, SW1, SW2, . . . SWx (e.g. SW0) is controlled by a control signal CTL0, CTL1, CTL2, . . . CTLx (e.g. CTL0) from the CPU (not illustrated). The CPU chooses the sub capacitor, which is connected to the main capacitor CS in parallel, by a horizontal deflecting frequency output control signal CTL0, CTL1, CTL2, . . . CTLx. Therefore, the CRT adjusts a correcting capacitance according to the horizontal deflecting frequency. The correcting capacitance is the equivalent capacitance of the S-character correcting loop 108. In FIG. 1, the value of x (CSx, SWx, CTLx) is 4. The output voltage of a D.C. voltage source B+ under normal circumstances is a standard value, for example, the standard value is 12 V, and the tolerable variance of the D.C. voltage source B+ is 5%. That is, the output voltage is 12.6Vxcx9c11.4V.
For example, the horizontal deflecting frequency is 31 KHz to 36 KHz. The control signals CTL0, CTL1, CTL2, CTL3, and CTL4 from the CPU are all at logic 0.
The controlled switches SW0, SW1, SW2, SW3, and SW4 are all on and the correcting capacitance of the S-correcting loop 108 equals to the sum of the main capacitor CS and the sub capacitors CS0, CS1, CS2, CS3, and CS4.
When the system is off, the output voltage of the D.C. voltage source B+ decreases gradually from the standard value to zero. However, when the output voltage of the D.C. voltage source B+ just decreases 5% from its standard value, the CPU misjudges that the system is in an abnormal status and the CPU resets the system. Therefore, all of the output signals from the CPU are set to logic 1. That is, the control signals CTL0, CTL1, CTL2, CTL3, and CTL4 are set to logic 1 and turn off the controlled switches SW0, SW1, SW2, SW3, and SW4. Then, the sub capacitors CS0, CS1, CS2, CS3, and CS4 are not connected in parallel with the main capacitor CS, and the correcting capacitance is equal to the main capacitor CS.
In the circumstances, voltage VCE, the output voltage V of the horizontal output circuit 104, between the collector and the emitter of the horizontal transistor Q2, includes a surge due to the decrease of the correcting capacitance. For example, under normal circumstances, voltage VCE of the horizontal transistor Q2 is about 1000Vxcx9c1100V. However, the voltage VCE of the horizontal transistor Q2 will be 1400V due to the surge when the CPU reset the system. The surge will damage the horizontal transistor Q2 seriously and decrease yield of the product.
It is therefore an object of the invention to provide a protecting circuit for a horizontal transistor. When the protecting circuit detects that the output voltage of the D.C. voltage source decreases to a threshold voltage, a switching circuit is on and at least one sub capacitor is connected to the main capacitor in parallel. Therefore, a surge of the cross voltage of the horizontal transistor is reduced and yield of the products is raised.
The invention achieves the above-identified objects by providing a protecting circuit for a horizontal transistor used in a horizontal deflecting circuit of a cathode ray tube. The horizontal deflecting circuit includes a horizontal driving circuit, a horizontal output circuit, and a S-character correcting loop. A D.C. voltage source provides a D.C. voltage to the horizontal deflecting circuit. The horizontal output circuit includes the horizontal transistor and the S-correcting loop includes a main capacitor, at least one sub capacitor, and at least one controlled switch. The controlled switch is for connecting the sub capacitor and the main capacitor in parallel selectively. The protecting circuit of the invention includes a switching circuit and a power sensor. The switching circuit is coupled to at least one sub capacitor. The switching circuit further connects the sub capacitor and the main capacitor in parallel when the switching circuit is on. The power sensor is for determining whether the D.C. voltage source is on. When the D.C. voltage source is off, the power sensor turns on the switching circuit.